Successive-Approximation ADC

The successive-approximation ADC is the most commonly used design (figure 8.6). This design requires only a single comparator and will be only as good as the DAC used in the circuit.

 
Figure 8.6:  The block diagram of an 8-bit successive-approximation ADC.

The analog output of a high-speed DAC is compared against the analog input signal. The digital result of the comparison is used to control the contents of a digital buffer that both drives the DAC and provides the digital output word.

The successive-approximation ADC uses fast control logic which requires only n comparisons for an n-bit binary result (figure 8.7).

 
Figure 8.7:  The bit-testing sequence used in the successive approximation method.

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